Forum Discussion
Altera_Forum
Honored Contributor
11 years agoWell I'm learning VHDL by my self and the only resources I have are books, forums and internet. I have to admit its not easy this way but I practice a lot to better understand how every thing works. Also thanks for this suggestion. I'll see how it performs. One more question if I may, when declaring something 'signed', the MSB always indicates the sign bit when code is compiled? So lets say that A is signed with a value 1100, will the compiler know that it means -4? I mean, how are std_logic_vector, unsigned, signed and integer synthesized?