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Okarin's avatar
Okarin
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5 years ago
Solved

Similation

I have a project for cyclone 3. Can I send a verilogue code to the input of a circuit to get a simulation in modelSim?
  • Those are just the created testbench files, you can copy it and save it as .v.


    Unfortunately, you vwf files does not have a place for you to store the testbench. If you want to do that, you may have to use modelsim instead.


5 Replies

  • KennyT_altera's avatar
    KennyT_altera
    Icon for Super Contributor rankSuper Contributor

    Those are just the created testbench files, you can copy it and save it as .v.


    Unfortunately, you vwf files does not have a place for you to store the testbench. If you want to do that, you may have to use modelsim instead.


  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor

    Yes. A testbench is typically code that is written as a "wrapper" around your design under test (DUT) that provides stimulus to the inputs and optionally monitors the outputs.

    • Okarin's avatar
      Okarin
      Icon for New Contributor rankNew Contributor
      i created university program vwf, selected the required inputs and generated testbench. However, the file was created in .vwf.vht format, not .v
  • KennyT_altera's avatar
    KennyT_altera
    Icon for Super Contributor rankSuper Contributor

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