Forum Discussion
Okarin
New Contributor
New ContributorSimilation
I have a project for cyclone 3. Can I send a verilogue code to the input of a circuit to get a simulation in modelSim?
Those are just the created testbench files, you can copy it and save it as .v.
Unfortunately, you vwf files does not have a place for you to store the testbench. If you want to do that, you may have to use modelsim instead.
sstrell
Super Contributor
Super ContributorYes. A testbench is typically code that is written as a "wrapper" around your design under test (DUT) that provides stimulus to the inputs and optionally monitors the outputs.
OkarinNew Contributor
New Contributori created university program vwf, selected the required inputs and generated testbench. However, the file was created in .vwf.vht format, not .v
