SignalTapII

Signal Tap is an invaluable tool. In normal algorithm and digital design, each VHDL/Verilog module has a testbench with it. As groups of modules are connected, then the resulting group has a testbench. However, there are times when a small module is added to an overall design and the time and effort of a testbench don't really fit, and Signal Tap can be used to verify the design. In addition, when using A/D converters, Signal Tap is invaluable for verifying the entire analog and digital signal processing chain is working. -James