Forum Discussion
Altera_Forum
Honored Contributor
16 years ago --- Quote Start --- I have some hardware to develop on but do not have access to the JTAG pins of the FPGA. --- Quote End --- Don't know why, but if so, you have to face the consequences. It's a very bad design decision in my opinion. SignalTap is basically a soft core, so it could be operated on a different interface in principle. But unfortunately, SignalTap as well as the virtual JTAG hub are protected Altera IP, so you won't be able to modify it as required. Also the SignalTap related virtual JTAG protocol is undocumented. That's the whole story, I think.