Thanks for the response. Under normal operation I'm getting a trigger every 1 ms, and I have to collect data for many hours before the error occurs, and it sometimes occurs for a few seconds, then recovers for a few seconds, then occurs again... It seems like with your technique i would need a 2nd level of filter to throw out the normal triggers or stop collecting after I get a trigger on an abnormal address. That especially doesn't help because currently i can only capture 512 cycles of my SignalTap clock; I could maybe break that down to about 32 segments of 16-cycles each.
You may have pointed me in the right direction though. I had set my 'storage qualifier' to state-based, but missed that there was a 'Trigger flow control' down below that was still set to 'continuous'. I changed that to 'State-based'. Unfortunately now when I compile I get these cryptic error messages:
Error (272006): Invalid Signal Tap custom flow control description was specified.
Error (287078): Assertion error: Valid clear box generator not found or Errors encountered during clear box generation
Error (12154): Can't elaborate inferred hierarchy "sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_signaltap_implb:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_trigger_flow_sel:\generated:ela_trigger_flow_mgr_entity"
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 3 errors, 27 warnings
Error: Peak virtual memory: 4912 megabytes
Error: Processing ended: Wed Dec 02 23:44:23 2020
Error: Elapsed time: 00:00:15
Error: Total CPU time (on all processors): 00:00:22
Error (293001): Quartus Prime Full Compilation was unsuccessful. 5 errors, 27 warnings
Any clue where I go from here?