Forum Discussion
So the problem had gone away for a while and I hadn't checked this forum thread, but it has appeared again and I'm still not sure what the resolution might be. The programmer succeeds in programming the FPGA (I also programmed the image into my configuration device in case that was the problem). So the JTAG interface is up and recognized, QII says that the device has been programmed, the DB and project were cleaned up, the timestamps all match, but it still tells me the design has changed immediately after the compilation finishes and I program the device. I had no problem working with SignalTap yesterday, and when I came in this morning I started getting this error (no changes made). The computer didn't restart, it was in the same state I left it in last evening. Is there a cause for this problem that anyone is aware of?