Forum Discussion
Altera_Forum
Honored Contributor
8 years agoSimpler answer/solution: at the top of the screenshot, you can see the Lock mode. Set the lock mode to only allow changes that don't require recompilation. This will include level and value trigger conditions and a few other options. Make the changes you need and then just start acquiring again. If something is grayed out when the lock mode is enabled, that means you have to either fully recompile the design or at least run a rapid recompile.
To your second point, setting the trigger condition *is* important during Signal Tap configuration because logic for the logic analyzer gets set up during compilation. However, the lock mode will show you what you can change without recompiling. A relatively new feature allows you to allocate additional nodes for future use and then just perform a rapid recompile instead of a full compile. For example, if you know you will eventually want to tap 15 nodes even through you're only tapping 10 right now, you can allocate an additional 5 nodes for triggering or data capture when you compile the design. Then later, tap the additional 5 nodes and perform a rapid recompile instead of a full compile.