Signal tap problem

I know I am digging up an old thread, but I ran into a slightly different problem, but would like to add a solution:

I already use the following constructs to have Quartus not synthesize away my debugging signals, this works every time:

attribute noprune : boolean;

signal diff_cnt : integer range 0 to 124999999;

attribute noprune of diff_cnt : signal is true;

Basically, this will save my signal diff_cnt from being optimized away, even though it may never be actually read anywhere, which normally will cause it to be optimized away as useless logic.

Then I had an array that would never show up in Signal Tap correctly:

Declaration:

type diff_array is array (0 to 7) of std_logic_vector(31 downto 0);

signal diffs : diff_array;

signal diff_index_cnt : integer range 0 to 7;

Usage:

diff_index_cnt <= diff_index_cnt + 1;

diffs(diff_index_cnt) <= std_logic_vector(to_unsigned(diff_cnt,32));

However, once I've added the initializations for instance in case of a reset:

diffs <= (others=> (others=>'0'));

diff_index_cnt <= 0;

the array finally showed up in Signal Tap as one would expect.

Hopefully this will help some fellows to debug their stuff without Quartus removing all the debug info or having to connect the debug info to virtual output pins (which will also prohibit Quartus from removing the stuff duing compile).