Occasional Contributor
Super ContributorDouble-check that you've actually enabled Signal Tap in the Settings dialog box. You may have the .stp file but if that checkbox is not enabled, the logic analyzer won't get included in the design. I'm presuming you're using the usual .stp file flow and not manually instantiating Signal Tap into the design.
In the project hierarchy, do you see the Signal Tap and related IP (like sld_hub or auto_fab) included in the project? If not, this is a clear indicator that it's not been added.
Are you adding pre-synthesis or post-fit nodes to the logic analyzer?
What hardware connection are you using to your device? I presume a USB Blaster, but confirm that you're using the same JTAG connection for successful programming as what you're using for Signal Tap.
Occasional ContributorThank you for your reply.
I am using a 'USB blaster' which is the same JTAG connection I use to program the FPGA.
I am adding pre-synthesis nodes.
I did not have signaltap enabled. I deleted all of my old stp files and created a new one. I added it to the project and can see it listed among my other files. Then, I went into assignments > settings > and clicked on the 'enable signal tap logic analyzer' and made sure that my new signal tap file (stp_test.stp) was selected. I compile the project (once) and then went back and used timequest to refresh my sdc file. I then compile the project again. Unfortunately, I still receive the 'instnace not found' message when I attempt to use signal tap.
Also, I do not see auto_fab or sld_hub IP included in my project files (if I search the messages I see reference to these files but they are not included in my project). Should I include the autofab somehow?
Best Regards,
James
