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Altera_Forum's avatar
Altera_Forum
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18 years ago

Signal probe??

I am a tyro. When I want to do some simulation to investigate what is happening inside the design, I am frustrated by the warning message "can't find the node XXX". I think the node I am interested i...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Hi Steady,

You say you are doing simulation on the design, from your saying on "can't find the node XXX", I guess you are doing gate/netlist level simulation. I seldom to netlist/gate level simulation, but I have little suggestion for you:

1. probe for node XXX*, normally after synthesis the node name will become xxx~combout or blabla

2. used the following synthesis option to prevent the node to be synthesized away: set_instance_assignment -name implement_as_output_of_logic_cell on -to <node name>

Also, as far as I know "signal probe" should be used for hardware signal probing/debugging.