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Thank you so so much! The noprune attribute is what I needed!
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Now that you mention it, I think that is the one that I had to use. If I recall correctly, you need this one if the register does not feed any real logic.
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But isnt it a bug, this behaviour? As mentioned before, pre-synthesis should save all nodes, no?
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I'm not sure its a bug, its just the way it has always worked. File a Service Request with Altera and see if they come up with a better explanation.
Keep in mind that the main objective of Quartus is for optimal design synthesis, not for probing, so I'd argue that eliminating redundant logic, unless I tell it not to via a synthesis attribute, is the correct thing to do.
Cheers,
Dave
Honored Contributor
