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Occasional Contributor
Occasional ContributorSerial Lite III Backpressure
Hello, The user guide for the Serial Lite III IP defines a ready_tx signal as follows: Question: Under what circumstances can the adaptation FIFO reach partial full? Doesn't the IP support ...
Kshitij_Intel
Frequent Contributor
Frequent ContributorHi,
In normal operation, on the Source Core, the interface clock is faster than the user clock, hence the adaptation FIFO should never reach partially full.
The adaptation FIFO will only reach partially full or even overflow, when the link status becomes abnormal. That’s when you need to backpressure the valid_tx.
Sorry, I don’t get the full data rate. The SLIII IP support “Basic” (continuous) mode and “FULL” (burst) mode.
Thank you,
Kshitij Goel
