SDC: forwarding clock with 90 degree offset

So now I need to make the clock bi-directional. In some states, the FPGA is the source of the clock/data and everything in this thread is the same (using the 90 degree offset, using "create_generated_clock", etc). In other states, an external device is providing the clock/data, so the input timing is no longer relative to my internal 90 degree clock, but rather relative to the external clock directly. Should I have 2 "create_generated_clock" commands to separate the two modes, or just a single "create_generated_clock" that both input/output constraints refer to? I'm worried that the tools may try to relate the input timing to my 90 degree clock.