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Hi: just wanted to check quickly that SDC (i.e. quartus sta) will honor a multicycle
exception ...
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The best way to check if any of your assignments work is to use the Timequest GUI.
A multicycle exception consists of a setup and a hold exception.
If you constrain the input (read_enable or write_enable) like the following:
set_multicycle_path -end -setup -to ] 2
set_multicycle_path -end -hold -to ] 1
This means that all paths in the fan-out of your *mem_clock_read_ena* register have a multicycle of 2 mem_clock.
This
*doesn't include automatically* the output of your memory. You'll have to check that.
If you want to check wether that worked (and on which paths) you'll have to open the Timequest GUI,
click "Report Timing..." and fill in
]
in the "From" and "To"-fields. Maybe you'll have to increase the value in the "Report number of paths"-
field too.
Now you can easily check weather you constrained paths obey to you multicycle.
Note that you have to
*take care in your hdl code* that this multicycle constrains makes sense.