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Altera_Forum
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16 years ago

Schematic project, rom clock!

Hello! I am making a little project with blocks and everything else, a schematic project. (Quartus II 8.1 web edition) I am using the lpm_rom. I would like to use a memory that with one clock g...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

lpm_rom can be operated with registered address and unregistered output, this means a latency of one clock cycle between address input and data output. Is this what you intend? Asynchronous (no-latency) operation isn't provided.