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Altera_Forum's avatar
Altera_Forum
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15 years ago

Same propagation delay for two signals

Hi, In my design i am using a combinational function with 2 inputs and four outputs. The problem is that, when i check the outputs of the FPGA i found glitches that are 'i think' due to a ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Glitches are a 'normal' byproduct of combinatorial circuitry because of the different paths the signals take to form the output. I'm quite sure there is no way to tell Quartus to build paths of equal lengths and certainly not for all operating conditions.

You either have to accept glitches, or rewrite the equations in such a way that no glitches are produced. The compiler however will try to optimize your efforts away by reducing the circuit to it's minimal form.