Altera_Forum
Honored Contributor
9 years agoRTL Simulation
Hello, I have been using ModelSim-Altera for my RLT simulations of my FPGA designs. I usually go to Tools->Run Simulation Tool->RTL Simulation and then ModelSim launches, compiles my project, run the sim and displays the data. I have seen others simply open ModelSim, Change Directory and then run a tcl script that compiles the project and runs the testbench simulation. The tcl script is rather lengthy and I was wondering if anyone knows if Quartus can generate the the tcl script for you?
I have heard this method is faster and would like to try it out. Can anyone help me? Thanks, Joe