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I also notice you're using a different clock for the LPM modules and your external input selector. Why? Are these two clocks related?
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Thank you very much for your quickly answer. I used two clock because in my code, i programmed it with FSM (Finite State Machine).
For example:
With Adder:
First clock (clk_40n): I send value of X1 and A1 to input of lpm_add_sub (adda and addb).
Second clock (clk_40n): I get the result from lpm_add_sub.
The time between first clock and second clock, lpm_add_sub will do his job (It must finish before second clock of clk_40n transfer from low to high.
with clk = 20ns and clk_40 = 40 ns.
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