Umasree
New Contributor
4 years agoregarding Quartus Prime
while synthesising verilog rtl its showing unavailable memory to synthesis and its taking nearly 10min for synthesising process.please check on that issue.
Hi Umasree,
Make sure your RAM meet the requirement for you project in term of device you used. I believe this could be due to this. Not able to run any project at all is very weird, supposed small design can pass the flow even you have a small RAM. Suggestion is to reinstall and check all requirement is met. Another way, try to clean .cdb file and database and recompile.