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Altera_Forum
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16 years ago

Recovery - DCFIFO issue

Hi, I have a design where a block of logic writes data to a DCFIFO at 66MHz and a seperate block reads the FIFO at 0.576MHz and sends the data through a RS232 interface. Also received data from th...
Altera_Forum's avatar
Altera_Forum
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16 years ago

I simply use the following set_false_path entries in my SDC which covers all instances of dcfifo : 


set_false_path -from }] -to  
set_false_path -from }] -to

This was taken from following solution on Altera website - what set_false_path assignments should i apply to the dcfifo megafunction when using the timequest timing analyzer? (http://www.altera.com/support/kdb/solutions/rd12032007_130.html)