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Altera_Forum's avatar
Altera_Forum
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11 years ago

Recommand approach to do the pin assignments

If I didn't use pin planner to do pin assignments before hand. After I finish my design, then I need to do pin assignments, what is the recommend approach to do pin assignments in this case? It looks...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

In my opinion, the best way is to create a Tcl script that implements the pin constraints, including any additional constraints like slew rate, output current, I/O voltage, etc.

Take a look at any of the example designs I have posted.

DE0-nano:

http://www.alteraforum.com/forum/showthread.php?t=45927

BeMicro-CV

http://www.alteraforum.com/forum/showthread.php?t=43992

1. Run the synthesis script for these projects.

2. Use "Project->Generate Tcl file for Project" to generate a Tcl file with all the Quartus settings.

3. Open the pin planner, right-click in the pin planner view and add extra columns for the various I/O settings.

Now you can compare the pin planner view and the generated Tcl file to the scripts/constraints.tcl script.

The constraints.tcl file contains a list of Tcl key-value pairs that correspond to the pin planner view, the key-value pairs are then converted to the Tcl constraints seen in the generated Tcl file. The key-value pair format makes it easier to see all the constraints associated with one pin (and is similar to Xilinx's .ucf format file).

Cheers,

Dave