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Altera_Forum
Honored Contributor
11 years agoI've recently started doing it in the VHDL architecture like this:
attribute chip_pin : string; attribute chip_pin of KEY1 : signal is "@88"; attribute chip_pin of KEY2 : signal is "@91"; It's described here: http://quartushelp.altera.com/13.0/mergedprojects/hdl/vhdl/vhdl_file_dir_chip.htm