Forum Discussion
Altera_Forum
Honored Contributor
8 years agoAre ADC_CLK_A and ADC_CLK_B clocks to the ADC? If so, you don't appear to be driving them (of course, it's a bad idea to clock an ADC from an FPGA output). Are ADC_OEB_A and ADC_OEB_B enables for the ADC? Make sure the ADC is not powered down. You don't say how you are triggering SignalTap. Some boards have lots of jumpers that must be set.