Forum Discussion
This is very strange/anoying. We upgraded our project to Quartus pro 25.3 (and applied the recent patch) a while ago.
Last week I created a new signaltap for some debugging. I also added some signals, changed the code an synthesized everything a couple of times - everything went smooth.
Now today after the weekend, I did some debugging with this signaltap and added some more signals (and second trigger) and I got the same error again:
"Error (22148): VHDL error at sld_ela_control.vhd(1263): Failure: "The design file sld_ela_control.vhd is released with Quartus Prime software Version 25.3.0. It is not compatible with the parent entity. If you generated the parent entity using the Signal Tap megawizard, then you must update the parent entity using the megawizard in the current release.": exiting elaboration File: e:/programs/altera_pro/25.3/quartus/libraries/megafunctions/sld_ela_control.vhd Line: 1263"
This time I can guarantee that there is no mix-up with different versions. Any new ideas?
A few things you can try to troubleshooting:
1. Run Quartus (and Signal Tap) with Administrator privileges.
2. Check whether any security software, antivirus, or endpoint protection could be blocking Quartus from generating or accessing the SLD files.
3. Delete the db/ and incremental_db/ folders, then recompile.
Regards,
Richard Tan
- MichaelL16 days ago
New Contributor
RichardT_altera Thanks for the hints, but
1. Administrator privileges didn't change anything
2. Only standard MS defender is active. As far as I understand accessing the SLD files is possible:Info(19337): VHDL info at sld_ela_control.vhd(72): executing entity "sld_ela_control(ip_major_version=6,trigger_input_width=3050,trigger_level=2,advanced_trigger_entity="basic,1,sld_reserved_sib_nsc3_fpga_auto_signaltap_0_2_c29c,",enable_advanced_trigger=1,mem_address_bits=9,sample_depth=512,state_bits=11,segment_size_bits=9,state_flow_mgr_entity="state_flow_mgr_entity.vhd",storage_qualifier_inversion_mask_length=0,storage_qualifier_advanced_condition_entity="basic")(1,59)(9172,9172)(1,25)(1,3)(1,5)" with architecture "rtl"
Error(22148): VHDL error at sld_ela_control.vhd(1263): Failure: "The design file sld_ela_control.vhd is released with Quartus Prime software Version 25.3.0. It is not compatible with the parent entity. If you generated the parent entity using the Signal Tap megawizard, then you must update the parent entity using the megawizard in the current release.": exiting elaboration
Info(19337): VHDL info at sld_ela_control.vhd(1174): executing entity "sld_ela_basic_multi_level_trigger(data_bits=3050)" with architecture "rtl"
Info(17551): VHDL info at sld_ela_control.vhd(1174): netlist sld_ela_basic_multi_level_trigger(data_bits=3050)(rtl) remains a blackbox, due to errors in its contents
3. There is only a qdb and a dni foler in my build-folder. I deleted both. Didn't change anything