Forum Discussion
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- aee24 days ago
New Contributor
Hi ShengN,
Thank you so much for your help! The INI file worked perfectly and I can now see and select the target chip correctly.
However, I’ve run into a new issue with the AI DSP IP core. When I instantiate it, the maximum configuration I can get is only 5 multiply-accumulate units for 8-bit numbers, which is a big gap from the public documentation stating it should support 10 parallel 8-bit multiplications. As a result, I’m only achieving a very low fraction of the peak compute performance.
Could this mean that I also need another specific configuration file or license to unlock the full 10 multiplication AI DSP block capability? Any guidance on this would be greatly appreciated!
- RichardT_altera20 days ago
Super Contributor
Could you please indicate which public documentation and which specific section state this information?
Additionally, which AI DSP IP core are you referring to?
To help with further investigation, please share your design QAR file (Project → Archive Project).
Regards,
Richard Tan - RichardT_altera15 days ago
Super Contributor
Any update on this?
Regards,
Richard Tan - RichardT_altera12 days ago
Super Contributor
Dear aee,
We will continue to monitor this post for the next 5 days. If there are no further inquiries during this period, I will step back and allow the community to assist with any future follow-up questions.
Thank you for engaging with us!
Best regards,
Richard Tan