New Contributor
Regular ContributorHi,
Thank you for your question. Based on your inquiry regarding the C10GX floating‑point DSP IP and its rounding behavior, I reviewed the available C10GX documentation. I was not able to find any reference indicating support for fused multiply‑add (FMA) operations, which suggests that FMA may not be implemented in this IP.
As a next step, could you try performing the same test using the Native Floating-Point DSP IP to see if there is any different in the observation.
If you have additional questions or need further clarification, please feel free to let me know. Thank you.
New ContributorHi,
thank you for the replay. I have tried with the Native Floating-Point DSP IP and it seems that the issue I was attributing to rounding errors has been resolved by using that IP, though I should run more thorough tests—even so, the differences are indeed quite significant.
In any case, in my opinion, it would be advisable to have clearer documentation regarding each of the IPs available in Quartus.
Thank you.
Regular ContributorHi Frank,
Thank you for the update. I’m glad to hear that the Native Floating‑Point DSP IP has resolved the rounding issue. From my understanding, the Native DSP IP allows users to access the DSP block directly, without relying on inference.
Please let me know if you have any questions or concerns. Thank you.
