rams in Quartus

I think, embedded RAM functionality is similar to Xilinx but not identical. Comparing the RAMB4_S16_S16 primitive with altsyncram Megafunction with appropriate parameters, I see two differences:

1. RST(A/B) is a synchronous clear while altsyncram has an asynchronous clear option.

2. RAMB4_S16_S16 has initialization in generics while altsyncram uses *.mif or *.hex file

There may be additional functional differences, but the altsyncram port signals can be parametrized to equal RAMB4_S16_S16 as far as I understand. If your application doesn't depend on synchronous clear for the output registers or initialization in generics, you can write a wrapper that emulates RAMB4_S16_S16 through altysncram.