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Thanks for the reply pletz.
Is there anyway to prevent the dangling ports from appearing in the pin planner. It´s just that i have to pass my part of the design onto another group and it just looks a bit untidy that they appear there when there are not really inputs and outputs. I tried simply deleting them but they reappear after the next compilation.
I understand that they are nothing to worry about but would be interested to know if there is a simple way to prevent them from appearing in the pin planner.
Manya thanks again,
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Hi,
it surpised me that you could see the internal dangling port in the pin planner. My understanding was that you could see only ports of your design in the pin planner. I never saw internal
signals in the planning tool ????
Kind regards
GPK
Honored Contributor
