Hi again,
Just one final question with regard to this issue.
I have sucessfully compiled my partitioned design but in certain partitions, I have some ports which are unused at the moment. They seem to appear as dangling ports in the pin planner even though they are not actual I/O´s.
Could someone explain to me what a dangling port is? an unused one?
Also they are interfering with timequest and it is complaining of 100´s of unconstrained paths, even though the design was fully constrained before partitioning. UJpon inspection they are mostly due to dangling ports.
I would be grateful if someone could let me know the best way to deal with dangling ports and explain exactly how they come to be?
Many thanks for the help.