QUIP: add_new_cell supports only subset of architecture?

If this has $ or strategic value, I would try to work with Altera directly on your goals. I know that may sound harsh, but you're probably asking for a lot of information, work, etc. and Altera is a business at the end of the day. (I kind of get what you're doing, but the term "maliciously compromised" can mean a lot of different things, and probably does.) If anything, Altera may like helping projects that may one day help Altera(especially when coming from somewhere so well respected...).

One thing I was going to say when I thought you were just trying to build a design, was to work with the tools, rather than try to understand everything they do. For example, rather than entering LUTs into the Chip Planner, learn to build them in source and then place them with assignments. The nice thing about this is the tools work much better with you. Even something like the ALM is much more complex than the old days of just a 4-input LUT and a carry-chain. I'm still finding out rules or how things are done that aren't quite what I expected. Now, if you're trying to be exhaustive in coverage and understand every scheme, that's not going to work, but it may help a little. (For example, if you're building test logic, don't build it completely as an ECO, build it as controlled source.) Just a thought. Good luck.