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Altera_Forum
Honored Contributor
Honored ContributorQuestions about resource usage
Hi, I have a pretty simple kernel that stores the image pixels to output as follows:
int index = get_global_id(0);
for (int i=index; i<WIDTH*HEIGHT;i++)
{
output = input;
}
The FPG...
Altera_ForumHonored Contributor
Honored ContributorYou are misunderstanding the hardware generated for FPGA. Essentially, your kernel becomes a "pipeline" where each work-item moves from one stage to the next stage every cycle, i.e. your kernel is fixed hardware and work-items run on it. Hence, the generated hardware is not affected by how many work-items there are. "Best Practices Guide" has a high-level description of the pipeline architecture generated.
