Forum Discussion
Altera_Forum
Honored Contributor
10 years agoYou are misunderstanding the hardware generated for FPGA. Essentially, your kernel becomes a "pipeline" where each work-item moves from one stage to the next stage every cycle, i.e. your kernel is fixed hardware and work-items run on it. Hence, the generated hardware is not affected by how many work-items there are. "Best Practices Guide" has a high-level description of the pipeline architecture generated.