Forum Discussion
7 Replies
- Altera_Forum
Honored Contributor
is it erroring out in Analysis and Synthesis? can you post the error.
i'm not sure if the required AHDL syntax can do [0:3], try [3:0]. other than that it looks like it should work - Altera_Forum
Honored Contributor
I tried using [0..3]. It works now. So we can not use [0:3] format, right?
- Altera_Forum
Honored Contributor
seems that way, you could try searching for AHDL documentation if this is legal or not. glad its working :)
- Altera_Forum
Honored Contributor
Another question is that I have a input signal goes to 5 places. Do I need to use a buffer when I edit the gdf? Does the software will automatically assign a buffer for it after synthesize? Thanks.
- Altera_Forum
Honored Contributor
no, you can just have an input pin and connect it to all of the destinations using a point to point net or using the named nets like you have in your example
- Altera_Forum
Honored Contributor
Thanks for your answer.
- Altera_Forum
Honored Contributor
I am migrating an old design(Quick Work) using Max Plus II. Do you know how to realize the attached schematic use Max Plus II. Thanks for your help.