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hokagechichi
New Contributor
New ContributorQuesta intel FPGA has no delay to Gate level simulation
I used Cyclone IV (EP4CE6E22C8), and the delay should be 9ns. However, my Gate level simulation's delay was 0. What should I do?
hokagechichiNew Contributor
New ContributorFinally, I found that I should turn off "Generate functional simulation netlist", then the gate level simulation will display correctly.
ref: https://www.youtube.com/watch?v=HFWd7QPibMY&t=400sh
Thank to everyone.
