Quartus/Platform designer instantiate my custom IP HDL as a new_component_cmp and results in error
Hi,
Each time I build my Quartus project that contains a .qsys with my custom IP used, it results in a syntax error where instead of using my custom entity name it uses new_component_cmp for the HDL generated by my system design (platform design). So, each time I have to replace/correct it manually and then it passes the syntesis.
Is there a ways around this silly issue?
Example: in auto-generated file soc_system_avalon_custom_leds_0.vhd this line is wrong:
avalon_custom_leds_0 : component new_component_cmp
The correct one should be:
avalon_custom_leds_0 : component avalon_custom_leds
Thank you in advance
Khalid.
Yes, the issue seems to be in the _hw.tcl, this line:
set_fileset_property QUARTUS_SYNTH TOP_LEVEL new_component.
Solution:
1- change it manually to use top entity name:
set_fileset_property QUARTUS_SYNTH TOP_LEVEL avalon_custom_leds
2- I noticed in the editor, if you click Analyze HDL bouton, it fixes it:
Thank you for you help and time @ShengN_Intel
Khalid