Forum Discussion
Altera_Forum
Honored Contributor
18 years agoHi dtietz
What you really need to do is build an Avalon master and/or slave interface for your device. If the data is relatively slow, you can just make the FIR a slave device, that the NIOS supplies the data one sample at a time, but usually, you want to have the FIR be a master device, which can grab data on it's one, from memory. If you really don't need the CPU in the system, what I would recommend, is writing the re-use muxing in Verilog. This can mux the data streams, and depending on the speed of the data, keep everything running for you. I believe, (Although I haven't used it) the fir generator, has the ability to mux 2 data paths though the same filter as well. (Again restricted by the speed of the data samples) Pete