Quartus18.x issue3: if elsif errant

Edit after post mistype and some missing word:

Actually not, I am exercising a working copy of project VM hosted. Try find a way to reproduce in a stable manner. Issue appear and disappear as from Other user I am interacting to find way to isolate this.

Actual good code was the same one performed bad. More affected target for now seems if elsif construct, leave me some time to test in deep.

On other design/board something similar unaddressed for now but close this issue seems plague LCD controller design too.

More important to me is how to avoid on my production unit.

Actually code classified good (same version issued) passed test stress on hardware. I leave as is for now to finish on time.

Some other board suffer strange similar issue, not understood last test:

LCD controller was good on test platform SC25 based, moved to SC08 LCD Image went fuzzy and out of sync. IP core has a lot of if elsif.

I was never able to reprogram .pof, (issue reported on another post) nor I understood what happened at that time. Left on stand by since November 2018. Also there issue appeared as moving target, never was the same. Last issue just disarmed me thinking of Synthesis failure.

Built just 4 samples prototypes for now, 1 SC25 (with wired LA interface pod was near to working less strange issue on dma rmw registers), 2 SC08, 1 SC04.

Recompiled and reloaded design to competitor device worked as it is.

This board has just MAX 10 on board so it is more difficult inspect, the one I was on has an STM32 processor controlling IP core so it was more simple test.

Now just injected Ethernet controller IP Core with uCless avalon controller deiven fro mUDP datagram. On Monday I start L.A and network inspection of both ram and register in Real Time try pinpoint what fail.

Regards

Roberto