Quartus won't let me use Signal Tap. Can't elaborate "sld_hub:auto_hub"

Hello,

I've been dealing debugging issues for quite a while with my FPGA design.

I had to use Signal Tap for advanced debugging, but for some reason it can't be used.

I am just following the tutorials on youtube about how to use the signal tap tool, but I always get the error that I posted at the end of this thread. Things I have tried so far: reinstallin the quartus with fresh windows 10, trying different versions of quartus, trying on different computers (total of 4). In all of these cases I have the same error.

I am just trying to get singal tap working. Using the "Signal Tap Logic Analyzer" section in "Tools" section in quartus, when I set it up and try to compile it I always get the error (see below)

More than a year I posted a similar problem here: https://forums.intel.com/s/feed/0D50P00004DAgF9SAL

As you can see it's not solved and not even a single useful suggestion was given.

PLEASE FOR THE OF GOD TRY TO SOLVE THIS PROBLEM THIS TIME. Many similar problems was posted as I see and not even single solution was provided.

Lastly, for the love of god don't tell it "it works on my computer can please reinstall quartus" because it was told million times and it didn't solve anything.

I also share .qar file.

Plase understand my frustration and I believe all of you that you can solve this problem.

Many many thanks.

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ERROR:

Error (11176): Set_instance_parameter_value: There is no parameter named DESIGN_HASH on instance alt_sld_fab

Error (11176): Alt_sld_fab.: version not allowed for EModuleProperty, must be in {[DESCRIPTION, NAME, VERSION, MODULE_TCL_FILE, MODULE_DIRECTORY, INTERNAL, HIDE_FROM_SOPC, HIDE_FROM_QSYS, HIDE_FROM_QUARTUS, OPAQUE_ADDRESS_MAP, GROUP, AUTHOR, ICON_PATH, DISPLAY_NAME, DATASHEET_URL, TOP_LEVEL_HDL_FILE, TOP_LEVEL_HDL_MODULE, INSTANTIATE_IN_SYSTEM_MODULE, EDITABLE, VALIDATION_CALLBACK, EDITOR_CALLBACK, ELABORATION_CALLBACK, GENERATION_CALLBACK, COMPOSITION_CALLBACK, PARAMETER_UPGRADE_CALLBACK, OUTDATED_IP_FILE, ANALYZE_HDL, STATIC_TOP_LEVEL_MODULE_NAME, FIX_110_VIP_PATH, SUPPORTED_DEVICE_FAMILIES, REPORT_TO_TALKBACK, ALLOW_GREYBOX_GENERATION, SUPPRESS_WARNINGS, STRUCTURAL_COMPOSITION_CALLBACK, NATIVE_INTERPRETER, PREFERRED_SIMULATION_LANGUAGE, REPORT_HIERARCHY, UPGRADEABLE_FROM]}

Error (12154): Can't elaborate inferred hierarchy "sld_hub:auto_hub"

Error: Quartus Prime Analysis & Synthesis was unsuccessful. 3 errors, 10 warnings

Error: Peak virtual memory: 4855 megabytes

Error: Processing ended: Sun Jun 07 12:42:06 2020

Error: Elapsed time: 00:00:30

Error: Total CPU time (on all processors): 00:00:56

Error (293001): Quartus Prime Full Compilation was unsuccessful. 5 errors, 10 warnings