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Altera_Forum's avatar
Altera_Forum
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19 years ago

Quartus VHDL Scematic

Hi,

Is it possible, with Quarts, to generate schematic from vhdl code?

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    19 years ago

    Hi..

    You can generate symbol file from VHDL code..

    In Schematic Design, that symbol file can be loaded..

    The step of generating symbol file is as follow.

    1. Load the vhdl code that you want to generate.

    2. Select : File Menu -> Create/Upload -> Create Symbol Files for Current File

    Good luck..
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    19 years ago

    Note that there is no way to get an editable schematic(the symbol is just a representation of the ports to instantiate the HDL into another schematic.) You can go to Tools -> Netlist Viewers -> RTL Viewer and get an RTL view of your code. It's not editable or re-usable(which makes sense, since the VHDL is your true source), but it's good for getting a visual of what you've written and how Quartus Integrated Synthesis is interpresting it.