Quartus v9.0 dual port memory generation wren now tri1

All,

I see in the newer 9.0 version, any new dual port memory version generated through megawizard has the input wren as tri1. This was not the case in earlier quartus version.

Is there a way to turn this off and make it a wire, so that simulation warnings donot appear?

I wonder if tri1 should be reserved for FPGA IO and not RAM io, as is the case here. Please generate and let me know your comments.

Thanks,

Fasahat