Altera_ForumHonored Contributor8 years agoQuartus show only dumber's incomplete view Hi, It feels like being treated as a dumb by Quartus. For example, we have a very simple add one counter, `timescale 1ns / 1ns module test_grammar (count, clk, reset); output [1:0] ...Show Morequar_2.jpg97 KB
Recent DiscussionsConnection bit order between hierarchyHow to fix Error(23782): Failed to find an expected reportSolvedQuartus 22.1 and 23.1 Synthesis ErrorCould not link 'vsim_auto_compile.dll' error troubleshooting.Failed to run ip-setup-simulation: