New ContributorHello,
I have an Agilex-5 SoC design where the HPS IO pins I’ve assigned (UART, I2C, SD/MMC, etc.) are not appearing in the All Pins view in the Pin Planner, even with the filter set to “Pins: All.”
Is this expected behavior, or is there another filter or setting I should adjust to view the HPS IO pins in the Pin Planner?
Thank you,
Dan
Regular ContributorHi Dan
After creating a wire and connecting it to the module in the top-level.
Proceed to completed the "IP Generation" and "Analysis & Synthesis" in the Compilation Dashboard only then you will see the pins in the Pin Planner.
If you are editing the GHRD package you would need to add in the pin in the tcl script (board_devkit_fm86_pin_assignment_table.tcl) of populating the pins in Pin Planner.
When compiling the GHRD package the tcl will run and that is why you are not seeing your pin in the pin planner.
You can follow the lines for the fpga_reset_n as an example.
Alternatively, you could remove the tcl script completely and you could see all the pins that in your top level.
Regards
tehjingy
Regular ContributorHiDan
Please let me know if further assistance is needed or if the solution worked for you.
Regards
Jingyang, Teh
