Forum Discussion
xxerexxaa
New Contributor
New ContributorQuartus Prime20.1 can't compile systemverilog syntax
我在使用modsim编译成功并且成功仿真以后想使用quartus烧录至FPGA上发现许多类似于class 和数学函数的使用在quartus里无法编译。 我已经修改了quartus prime 20.1 的编译器为SystemVerilog但是还是无法编译class。请问有人遇到类似的情况吗？ 据我所知可能是软件本身的问题，但是我的导师希望我最好还是使用quartus，所以请问有什么比较好的不...
xxerexxaaNew Contributor
New ContributorThank you!
Dose it mean that I have to change my code if I want to implement the algoritm to the FPGA? If yes, can recursive functions be used in the compiler tools?
FvM
Super Contributor
Super ContributorHi,
I believe I already gave the answer. See also https://stackoverflow.com/questions/70615674/are-recursive-functions-in-verilog-synthesizable
I believe I already gave the answer. See also https://stackoverflow.com/questions/70615674/are-recursive-functions-in-verilog-synthesizable
