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まつたか's avatar
まつたか
Icon for New Contributor rankNew Contributor
5 years ago
Solved

Quartus Prime Lite Ver20.1のFP_FUNCTION Intel FPGA IPの作成でGeneration Faildになる不具合発生の対策について

  • KennyT_altera's avatar
    KennyT_altera
    5 years ago

    Since we have provided the workaround, and we do not receive any response from you to the previous answer that we have provided. Please post a response in the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions.


KennyT_altera's avatar
KennyT_altera
Icon for Super Contributor rankSuper Contributor
5 years ago

Thanks for your attachment,

To work around this problem, Can you try to generate the add_sub Intel FPGA IP in Quartus® Prime std Edition software version 18.0 and use the RTL generated files to Quartus Prime std Edition software version 20.1?

I test the workaround above on my side, it seems to work. I will log a bug to our developer to fix it.