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SMore11's avatar
SMore11
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7 years ago

Quartus Prime Lite stuck during compilation (analysis & synthesis step)

Hello, I have troubles when I compile a project of mine on Quartus Prime Lite 18.0 with, as target FPGA device, a MAX10 (10M08DAF256C8GES). The compiler is stuck during the elaboration of a componen...
Hakeen's avatar
Hakeen
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5 years ago

here the code:

// create module
module blink(
input wire clk, // 50MHz input clock
output wire [7:0] LED // array of 8 LEDs
);

// create a binary counter
reg [31:0] cnt; //32 bit counter

initial begin

cnt <= 32'h00000000; // start count at zero

end

always @(posedge clk) begin

cnt <= cnt+1; // count up

end

//assign LEDs to bits 28 through 21 of the counter

assign LED = cnt[28:21];