Forum Discussion
14 Replies
- MEIYAN_L_Intel
Frequent Contributor
Hi,
Could you try the Platform Designer Tutorial to generate HDL for Nios II processor in the link below:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/tt/tt_qsys_intro.pdf
Thanks
- CFurr1
New Contributor
Does the NIOS II need a license to work and the HDL file to generate? I followed a similar tutorial with the same results. The Platform Designer shows no errors until I click the generate HDL button then I get the error of can't find module for the system I am making.
- MEIYAN_L_Intel
Frequent Contributor
Hi,
May I know the information as below:
- Quartus Prime edition and version
- Os version
Thanks
- CFurr1
New Contributor
I am using the Lite Version 19.1 running on Ubuntu 16.04
- MEIYAN_L_Intel
Frequent Contributor
Hi,
For the Quartus Prime Lite edition is not required license file.
I had try to generate HDL for a system with with step as below:
1. New Project (in Quartus)
2. Open PLatform Designer
3. Connect the system with clock source and Avalon-MM clock crossing bridge
4. Generate HDL
It is successfully generate.
May I have the full error message for further investigate?
Thanks
- CFurr1
New Contributor
[image: Screenshot at 2019-12-31 10:58:26.png] [image: Screenshot at 2019-12-31 10:58:51.png] Here are some screen shots of the Platform Builder. It seems that not matter what module I connect to the NIOS-II CPU it can't find that module. I have tried FIFO's JTAG-UART, PIO, SRAM.... all have the same error of can't find the module. Thanks -Clint
- MEIYAN_L_Intel
Frequent Contributor
Hi,
I am not able to look into the screenshot. Could you try to attach the screenshot again?
Thanks
- CFurr1
New Contributor
sure here you go zipped them up.
- MEIYAN_L_Intel
Frequent Contributor
Hi,
I am still not able to have the zipped attachment as seen in picture below:
You may try to attach the picture as picture below:
Thanks
- CFurr1
New Contributor
This is turning out to be quite difficult lol. I made a Google share folder that has the pictures hope this does the trick. Your attached pictures did not come through as well. https://drive.google.com/drive/folders/12cNfsp18tlmbdomDrPXodR0ke1aM58zq?usp=sharing Thanks
- MEIYAN_L_Intel
Frequent Contributor
Hi,
I have tried this system connection in Quartus Prime Pro 19.3 and the system is not allowed to connect data master to on-chip memory s1 and avalon mm pipeline bridge s0. But in your picture show no error with this connection.
I had reported this issue to the developer.
Also, I had tried to used Quartus Prime Lite v18.1 to connect the system in Platform Designer as well. It does not show the error with failed to find module.
May you try to revert back to Quartus Prime Lite v18.1?
Thanks
- CFurr1
New Contributor
Thanks for all your help. I did try version 18 and it has worked so far without error. Thanks.
- MEIYAN_L_Intel
Frequent Contributor
Hi,
Glad to hear that you have success to generate HDL in Platform Designer.
Thanks
- DDoro
New Contributor
To solve your problem, you need to set the "Create HDL design files for synthesis" to "None" in the generation window in Platform Designer