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AndyV51 where did you read that interface arrays are supported ?
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Nowhere. I had some in my design, and Quartus didn't complain about them. But, if it supports them at all, it does it in a very strange manner.
Some example code:
interface reg_sigs_ifc;
bit in;
bit out;
modport regs(input in, output out);
endinterface
module regs(clk, rst, en, reg_sigs);
parameter num_regs = 6;
input bit clk, rst, en;
reg_sigs_ifc reg_sigs; //interface array
bit in;
bit out;
genvar i;
generate
for(i = 0; i < num_regs; i++) begin: gen_regs
assign in = reg_sigs.in;
assign out = reg_sigs.out;
end
endgenerate
always_ff @ (posedge clk, posedge rst) begin
if(rst == 1'b1) begin
out <= '0;
end else begin
if(en == 1'b1) begin
for(int i = 0; i < num_regs; i++) begin
out <= in;
end
end
end
end
endmodule
This example compiles successfully by Quartus,
but no registers are generated. So I prefer not to use such constructs.
Honored Contributor
