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Altera_Forum
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16 years ago

Quartus equivalent to XST attribute rom_extract

Hello, I am working on a design that should use some ROM blocks. I know that on Virtex4 you can use rom_extract attribute to pack a component that uses a large WITH...SELECT statement into ROM,...
Altera_Forum's avatar
Altera_Forum
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16 years ago

Thank you for the quick reply Jake!

Your advice was very usefull. When I set the "allow_any_rom_size_for_recognition" ON the compiler generated an altsyncram megafunction for the component I wanted. Unfortunately it generated the same megafunction for other components that would have been better implemented in logic. When I tried to used the assignment editor to assign only the desired component to RAM the synthesis summary was exactly the same as the one that had not used ROM at all. Also I was not able to find any messages saying that altsyncram megafunction was inferred. On the other hand I found a warning saying warning: feature logiclock is not available with your current license. Could this be the reason why the assignment from the Assignment Editor had no effect?

After a bit of searching I found an interesting thing in the QuartusII Handbook, Integrated Synthesis: there is actually a VHDL attribute called romstyle that should infer ROM when used in describing a component, unfortunately it has no effect when I compile the design. Could this also be because of the previous warning?

Benny