Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Quartus EDA Netlist Writer

Hi, Using Altera Model-Sim to do a gate level simulation. The .vo file that is produced doesn't seem to be modeling the internal RAM's correctly. In the design they are instantiated as 12bit...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

So far, you're not reporting an error, I think. Internal RAM doesn't offer a 12 Bit mode, depending on the memory size, it may be possibly split into 3x4 bit. If you observe functional errors, you should describe them in detail.