Altera_ForumHonored Contributor9 years agoQuartus does not support the module IO were defined as real or user defining ? for example: ENTITY interpolation_filter IS PORT( clk : IN std_logic; clk_enable : IN std_logic; reset ...Show More
Altera_ForumHonored Contributor9 years agoThe error log is self exaplanatory. Real variables are not synthesized.
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